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Cypress Semiconductor /psoc63 /SCB0 /INTR_SPI_EC_MASK

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Interpret as INTR_SPI_EC_MASK

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31282724232019161512118743000000000000000000000000000000000000000000 (WAKE_UP)WAKE_UP0 (EZ_STOP)EZ_STOP0 (EZ_WRITE_STOP)EZ_WRITE_STOP0 (EZ_READ_STOP)EZ_READ_STOP

Description

Externally clocked SPI interrupt mask

Fields

WAKE_UP

Mask bit for corresponding bit in interrupt request register.
EZ_STOP

Mask bit for corresponding bit in interrupt request register.
EZ_WRITE_STOP

Mask bit for corresponding bit in interrupt request register.
EZ_READ_STOP

Mask bit for corresponding bit in interrupt request register.

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data